The present disclosure relates to a methodology for correcting design errors in a photomask design layout and a system for implementing the same.
Errors in a photomask design layout cause costly interruptions during manufacture of a physical photomask as well as a high probability of generating a hot spot in a printed lithographic pattern that can result in an anomaly in a printed pattern. A mask rule check (MRC) program is typically run to generate a list of design errors in the photomask design layout so that each design error can be inspected and corrected before generating an error-free photomask design layout. However, the process of reviewing and correcting the design errors can be time-consuming because MRC programs tend to catch many design errors when the design layout includes many device components. For example, it is not uncommon for a design layout representing a collection of billions of semiconductor devices to generate a list of design errors numbering thousands of even tens of thousands of design errors even at a later stage of design layout correction.